Although the continued weakness of the global economy has dragged down the semiconductor market sentiment index, there is one area that has a unique landscape, that is, the Internet of Things. IC Insights, a well-known semiconductor market research organization, is extremely optimistic about the IoT market. The company's forecast is that IoT semiconductor sales will grow by 19.9% ​​in 2016, and the overall market size will reach 29.6 billion US dollars by 2019.
However, the growth of the IoT market is not as smooth as expected, just as IC Insights has lowered its market forecast from the previous growth of 21.1% to 19.9%. In addition to the economic environment, IoT-related application technologies still face different levels of challenges in terms of maturity, power consumption, cost, size, and packaging. The semiconductor manufacturers and solution providers are able to solve the technical capabilities of these challenges. Market competition has had a very important impact. Xie Jie, Marketing Director of Mie Fujitsu Semiconductor Corporation (MIFS), elaborated on these issues in a recent speech: "Industry-leading foundries including MIFS are trying to break through the limitations of the process and help Semiconductor solution makers have won the huge market opportunity of the Internet of Things."
Xie Jie: “MIFS has customized a unique process for the Fragmented Networking SOC.â€
IoT chips are "fragmented"The theme of Xie Jie's speech is “MIFS Featured Process for the Decentralized Networking SOCâ€, and the concept of “fragmentation†has attracted the attention of many participants. "The Internet of Things application scenarios are extensive and rich. Customers in different application areas have different requirements for the details of the chip solution. As a result, many chips are designed to meet the niche market design, and the production volume cannot be expanded, so the mass production of the chips is severely fragmented." Xie Jie explained. In fact, this is also the consensus of the industry. Although the Internet of Things has huge market potential, there is a huge difference between the Internet of Things and the past mobile phone, PC and other product areas, that is, the application in this field is very scattered. "The result is that the NRE cost of chip manufacturing is high, and many foundries are reluctant to pick up such difficult orders." Xie Jie further pointed out.
There has been a lot of thinking in the industry about the challenges posed by fragmentation. Earlier, some people in the industry pointed out that the reason why the Internet of Things has not developed as well as imagined is that one of the important reasons is the obstacle of "fragmentation." However, "fragmentation" is the "instinctive" of the Internet of Things - sensors are diverse, wireless connectivity standards are diverse, and application categories vary widely - which poses challenges for both chip design and end product design. "We are optimistic about the future of the Internet of Things and hope to take advantage of cost and process advantages to help Chinese customers solve the challenges of fragmented convection of IoT applications." Xie Jie said that he summarized MIFS's foundry service advantages as "comparable." The cost of manufacturing in China is both made in Japan."
Important things say three times: low power, low power, low powerThe green design concept has been deeply rooted in people's minds, and the low-power challenge does not seem to be a “patent†for IoT applications. However, in fact, the uniqueness of the Internet of Things is destined to be particularly sensitive to power consumption, even for the expansion of IoT applications, the industry is low-power "breaking the heart" - WiFi Alliance officially released the main low power consumption Features the 802.11ah WiFi standard; the Bluetooth Standards Organization specifically tailors the Bluetooth Smart standard for applications that use button cells such as heart rate monitors or pedometers; the introduction of NB-IoT low-power WAN technology puts competitive technology under pressure; ...and in the key device areas of IoT solutions such as sensors and MCUs, the competition for related low-power products and technologies is becoming increasingly fierce.
The popularity of the Internet of Things, China's IC design companies have also emerged more and more players into the chip, low-power MCU, wireless connectivity and other chip solutions to chase the business opportunities brought by the mobile Internet era of intelligence and the Internet of Things. However, demanding low-power features can become an invisible threshold. "This is related to the low-power optimization design knowhow of the circuit, and more importantly, how to achieve low-power process advantages in chip manufacturing." Xie Jie pointed out. He also used the case of a well-known European enterprise from MIFS to illustrate the low-power sensitivity of typical applications in the Internet of Things. For a monitoring chip in a pacemaker, in order to significantly extend the battery replacement cycle, the production process needs help. Achieve ultra-low standby power consumption and operating power consumption. "Even if the battery life is extended for a few more days, it will be of great significance to the patient. In the end, the superior low-power advantage of our DDC (fully depleted channel) was chosen by them." Xie Jie shared.
In response to the challenges posed by these specialized applications, many foundries have joined the development of new processes for low-power manufacturing. MIFS is no exception. It is reported that the company is the only one in the world to achieve ultra-low voltage and ultra-low leakage transistor technology with DDC technology. Foundries. Xie Jie's in-depth professional analysis of his low-power process occupies a major part of his speech, and is also the focus of attracting field chip design manufacturers. Xie Jie gave the most intuitive data - compared to the traditional 1.2V working voltage chip, the chip based on DDC low power process can work at 0.5V, and the power consumption is greatly reduced. “The ultra-low leakage current of DDC guarantees the chip's low power consumption during sleep and operation, and its ultra-low operating voltage is critical to reducing power consumption,†Xie Jie explained. According to the report, in the same signal eye diagram test, the 45nm chip based on DDC technology can still observe the signal eye diagram even under the power supply voltage of 0.4V, and the chip of a large factory has been under the power supply voltage of 0.6V. stop working.
Sub-threshold circuits based on DDC technology can significantly reduce chip power consumption.
It is reported that MIFS's new low-power DDC process technology was developed by SuVolta in the United States, and MIFS has bought out the patent. The ultra-low-power CMOS technology of DDC CMOS transistors controls the threshold (Vt) deviation of the transistor and increases the mobility of the carrier. "If this technology is used, the power consumption during operation can be reduced by up to 50% compared with the average integrated circuit without reducing the operating speed of the IC." Xie Jie said. MIFS has further improved DDC technology, and has developed a DDC transistor with a leakage current that can reduce 2-digit numbers. This DDC transistor is best suited for Sub-threshold circuits. “MIFS's exclusive patented new process makes 'Half the POWER, All the Performance' a reality,†said Xie Jie.
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